![]() Time-symmetry appears in physics when a system can go back in time by applying the same transition function as for forward computations after a weak transformation of the phase-space. So, this notion is even stronger than the concept of time-symmetry studied in. These automata can be seen as finite automata whose state graphs are undirected. Here, we are interested in a strict form of reversible finite automata, namely we do not only require that every state of the automaton has a unique predecessor for a given input letter, but that this predecessor can already be reached by a forward transition with the same input letter. Recent results on reversible finite automata can be found, for example, in. The observation that loss of information results in heat dissipation strongly suggests to study computations without loss of information. ![]() Since abstract computational models with discrete internal states may serve as prototypes of computing devices which can physically be constructed, it is interesting to know whether these abstract models are able to obey physical laws. Reversibility is a fundamental principle in physics. Subregular language families of particular interest are the families of languages accepted by types of reversible finite automata. In most cases, it turned out that the conversion problem is nearly as costly (in terms of the number of states) as in the general case. ![]() In particular, the determinization of nondeterministic finite automata that accept some subregular languages has been investigated in detail. For instance, deterministic expression languages or one-unambiguous regular languages are motivated from document type definitions (DTDs) used in standard generalized markup language (SGML) and extensible markup language (XML) schemes. Since then, new developments in the theory of computer science triggered the study of new subregular language families. A list of some of these early regular subfamilies, their structure, and their properties was already given by Havel. Some of these regular subfamilies were motivated by particular issues such as, for instance, neural nets or circuit design. Examples of early studied classes are finite languages, definite languages and variants, star-free languages, etc. Already since the early days of automata theory, a significant theory on subfamilies of regular languages has been developed in the literature. A recent survey of the several branches and details can be found in, which is also a valuable and comprehensive source of references. It seems that the recent studies of operational state complexity focus on subregular languages. In the meantime, impressively many results have been obtained for a large number of language families. More than two decades ago, the operation problem for regular languages represented by deterministic finite automata as studied in renewed the interest in descriptional complexity issues of finite automata in general. The operation problem for a language family is the question of costs (in terms of states) of operations on languages from this family with respect to their representations. This work is part of research performed within the PRESTO project (ARTEMIS-9362), a research project co-funded by the European Commission under the ARTEMIS Joint Undertaking Programme. Being made aware of these issues and the need for optimisation or a more powerful microprocessor long before the integration stage will certainly help keep the costs of such mistakes down. Pairing timing budgets in specifications with the use of RapiTime will help identify potential timing pinch points much earlier in the development process. However, if the transition takes more than 10, or is not followed by ‘C’ then NOK state will be reached.Īt the requirements or design stage of a project this can be used to assign budgets to software components. If this transition happens in less than 10 units of time and is followed by the ‘C’ input then the OK state will be reached. In this notation T is the current time and S1.T is the time recorded on entry to the S1 state. In this example the transition from S1 to S2 now needs to happen in less than 10 time units.
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